assembly - Risc processor the Negation of a register -
we consider risc processor have few command dbnz. trying write code writes negation of register b , second separate code should subtract b , put result c
i not sure how don't maybe possbile nasm assembler 2 different things not sure how start
for record, real risc architectures (e. g. arm or mips) richer dbnz. envision designated oisc or urisc.
nasm, way, of no help. targets real life cpus; yours academic model. putting emulator in high level language rather trivial. can write 1 in javascript in hour or so.
the syntax i'm assuming command is:
dbnz reg[, label]
and meaning is:
reg = reg - 1 if label given , reg != 0 goto label
if label omitted, implicit jump target next instruction. it's lump of syntactic sugar me, better code readability.
everything after semicolon end of line comment. labels terminated colon. code assumes registers have finite size, , integer wrap-around happens quietly, without exceptions.
the algorithm negation easy enough:
b=0 while > 0 = a-1 b = b-1
in assembly, conditional jump , decrement 1 , same. go this:
;zero out b bzeroloop: dbnz b, bzeroloop ; decrement until it's 0 ;main loop: subtract until it's zero, decrementing b on every iteration negloop: dbnz b ; decrement b no jump dbnz a, negloop
now subtraction. algorithm subtracting b in place (i. e. result stays in register) goes:
while b != 0 b = b-1 = a-1
it's in fact same loop in negation, without initial zeroing out. can think of negation of case of subtraction in place - specifically, it's subtracting zero.
but need result go c. in less stunted language, we'd assign. don't have assignment. it's possible assignment 2 negations , temp register. can make 1 negation - first, calculate b-a in place, negate c:
while != 0 = a-1 b = b-1 ;this reduces b value of b-a c = 0 ; loop while b != 0 b = b-1 c = c-1
or, in assembly:
subloop: ; b = b-a dbnz b dbnz a, subloop czeroloop: ; c = 0 dbnz c, czeroloop negloop: ; c = c-b dbnz c dbnz b, negloop
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